High-volume fabrication of complementary metal-oxide-semiconductor (CMOS) image sensors via wafer-level processes has contributed to the incorporation of cameras in high-volume consumer products such as mobile devices and motor vehicles. Such cameras each include a CMOS image sensor having a pixel array, wherein the top surface of each pixel is typically either a microlens or a spectral filter for focusing light or filtering light incident thereon. In a wafer level process, thousands of CMOS image sensors are formed on a device wafer, which may be optionally bonded to a carrier wafer, and then singulated into individual dies with a dicing saw. The dicing saw may separate-individual dies along previously-formed grooves. Such wafer dicing is known in the art, and explained by E. Iannone in Labs on Chip: Principles, Design and Technology (CRC Press, 2014). Both the groove formation and the die-sawing process can generate debris that adheres to one or more pixel top surfaces. These contaminants render the associated pixel inoperable and are a significant contributor to reduced product manufacturing yield.